Enclosed in the following short article is a short description of the

R65C02 Microprocessor made by Rockwell. For those 8-bitters who are looking

for a cheap upgrade to a PET or those 64/128 owners who want a few extra

commands to their microprocessor. (Note that the pins of an 6502 are not

compatible to a 6510 or an 8502). This information is handed out by

Rockwell and is in the public domain.



[Some important points to keep in mind about the R65C02:



First, this is the microprocessor that's in Schnedler System's TurboMaster.

Schnedler also markets an assembler (MAE64 v5) and a multi-pass symbolic 

disassembler (Symbol Master - great product!) that supports the extra 

opcodes. For more information on the TurboMaster or the software, contact:



Schnedler Systems

Dept. CIS, 25 Eastwood Rd, P.O. Box 5964

Asheville, NC  28813

(704) 274-4646



Second, it's important to point out that using the extra opcodes in a

program will mean that the program is likely to fail when run on a standard

6502 (or 6510 in the case of the 64). Those opcodes may do nothing in a

6502 or may do something other than what a 65C02 will do.



Third point relates to the second. Any program that uses these opcodes

expecting to run on a 6502 will also yield unpredictable results. Some

games programmers use 6502-bogus opcodes as a protection measure. Most

machine language monitors for 6502's will display unimplemented opcodes as

??? thereby making it tougher for people to figure out the code. Although

this is probably most common in games, I know that PaperClip uses such

codes (unfortunately). There may be other productivity packages that do

too, but PaperClip is the only one I'm sure about.



Fourth, I haven't been able to check this data for accuracy. I presume that 

this data has been copied from the Rockwell spec sheet.



- Malcolm 76703,4243]



Features



CMOS silicon gate technology

Low Power (4ma/MHz)

Software compatible with the R6502

Single 5V power supply requirements

Eight bit parallel processing

Decimal and Binary arithmetic

True indexing cabability

Programmable Stack Pointer

Interrupt Capability

Non-maskable interrupt

Direct Memory Access Capability (DMA)

4MHz operating speed





Listing of R65C02 additional opcommands



BBR Branch on Bit Reset

BBS Branch on Bit Set

BRA Branch always

PHX Push X register on stack

PHY Push Y register on stack

PLX Pull X register from stack

PLY Pull Y register from stack

RMB Reset memory bit

SMB Set memory bit

STZ Store Zero

TRB Test and reset bits

TSB Test and set bits



Listing of old opcommands with new address modes



ADC Add memory to accumulator with carry

AND AND memory with accumulator

BIT Test bits in memory with accumulator

CMP Compare memory and accumulator

DEC Decrement memory by 1

EOR Exclusive OR memory with accumultor

INC Increment memory by 1

JMP Jump to a new location

LDA Load accumulator with memory

ORA OR memory with accumulator

STA Store memory with accumulator





OPCODE   Mnemonic  Address      Bytes Cycles



80       BRA       Relative       2     3

DA       PHX       Implied        1     3

5A       PHY       Implied        1     3

FA       PLX       Implied        1     4

7A       PLY       Implied        1     4

9C       STZ       Absolute       3     4

9E       STZ       Absolute,X     3     5

64       STZ       ZeroPage       2     5

74       STZ       ZeroPage,X     2     4

1C       TRB       Absolute       3     6

14       TRB       ZeroPage       2     5

0C       TSB       Absolute       3     6

04       TSB       Zeropage       2     5

0F-7F    BBR       Zeropage       3     5

8F-FF    BBS       Zeropage       3     5

07-77    RMB       ZeroPage       2     5

87-F7    SMB       ZeroPage       2     5



Hex codes for old opcodes with new address



Hex  Mnemonic  New address     Bytes  Cycles

72   ADC       Indirect          2      5

32   AND       Indirect          3      5

3C   BIT       Absolute,X        3      4

34   BIT       Zeropage,X        3      4

89   BIT       Immeadite         2      2

D2   CMP       Indirect          2      5

3A   DEC       Accumulator       1      2

52   EOR       Indirect          2      5

1A   INC       Accumulator       1      2

7C   JMP       Absolute,X        3      6

B2   LDA       Indirect          2      5

12   ORA       Indirect          2      5

F2   SBC       Indirect          3      5

92   STA       Indirect          2      5





New Opcode effects on registers





Opcode         Processor Status Code

.              7 6 5 4 3 2 1 0

.              N V . B D I Z C

BRA

PHX

PHY

PLX            X           X

PLY            X           X

STZ            X           X

TRB                        X

BBR

BBS

RMB

SMB

